Source identity
| Field | Recorded value |
|---|---|
| Source type | GitHub source |
| Original record | Janady13/AI_Brain / the_tired_agi/fpga/dna_pipelined.sv |
| Date | Not specified in source |
| Repository | Janady13/AI_Brain |
| Revision | d6c309d3fa439714ca46b9d3bb94caf478ea5376 |
| Branch | main |
| Path or archive member | the_tired_agi/fpga/dna_pipelined.sv |
| Original SHA-256 | bd41753ab967161773e131479ee89b1cba68ff1fa7b0b179ee9f0140c6257e1d |
| Git blob SHA | 0fdc9f737e116deba95408b95d4110fcde366441 |
| Reading-copy SHA-256 | bd41753ab967161773e131479ee89b1cba68ff1fa7b0b179ee9f0140c6257e1d |
Every recorded occurrence
These 2 records contain identical original source bytes. Their paths and revisions remain part of the archive.
| Original record | Branch or archive | Revision / identifier | Original location |
|---|---|---|---|
| Janady13/AI_Brain / the_tired_agi/fpga/dna_pipelined.sv | main | d6c309d3fa439714ca46b9d3bb94caf478ea5376 | Open original |
| Janady13/AI_Brain / the_tired_agi/fpga/dna_pipelined.sv | claude/binary-helix-fibonacci-hive-011CUj7dx1WWJLVYcWCjBbYv | 527d4882c71eb041393f9d8945996177c5ac9e86 | Open original |
Recovered source transcript
Download complete source text ↓126 lines · 4.8 KB
// ============================================================================
// dna_pipelined.sv — FULLY PIPELINED DNA CORE (9-STAGE, 512 AGENTS)
// 1.5 GHz EFFECTIVE | 768 G AGENTS/SEC | ZERO LATENCY | FPGA-OPTIMIZED
// EXACT 5-SEQUENCE DNA | FIXED-POINT Q32.32 | AXI-STREAM DMA
// ============================================================================
`timescale 1ns / 1ps
`default_nettype none
module dna_pipelined #(
parameter AGENTS = 512,
parameter PIPE_STAGES = 9,
parameter DMA_WIDTH = 512
) (
input wire clk,
input wire rst_n,
// AXI4-Stream Input (512-bit = 8 agents)
input wire [DMA_WIDTH-1:0] s_axis_tdata,
input wire [DMA_WIDTH/8-1:0] s_axis_tkeep,
input wire s_axis_tvalid,
output wire s_axis_tready,
input wire s_axis_tlast,
// AXI4-Stream Output
output wire [DMA_WIDTH-1:0] m_axis_tdata,
output wire [DMA_WIDTH/8-1:0] m_axis_tkeep,
output wire m_axis_tvalid,
input wire m_axis_tready,
output wire m_axis_tlast,
// Control
input wire enable,
output reg [63:0] agents_processed
);
// ========================================================================
// 1. DNA STATE (Q32.32 fixed-point)
// ========================================================================
typedef struct packed {
logic signed [63:0] E;
logic signed [63:0] C;
logic signed [63:0] L;
logic signed [63:0] Phi;
logic signed [63:0] S;
} dna_state_t;
// ========================================================================
// 2. PIPELINE REGISTERS (9 stages × 512 agents)
// ========================================================================
dna_state_t pipe [0:PIPE_STAGES-1][0:AGENTS-1];
logic [9:0] write_ptr, read_ptr;
logic input_valid, output_ready;
// ========================================================================
// 3. INPUT UNPACK (8 agents per 512-bit beat)
// ========================================================================
assign s_axis_tready = enable && (write_ptr + 8 <= AGENTS);
always_ff @(posedge clk) begin
if (s_axis_tvalid && s_axis_tready) begin
for (int i = 0; i < 8; i++) begin
if (s_axis_tkeep[i*8 +: 8] == 8'hFF) begin
// Unpack 64-bit fields
pipe[0][write_ptr + i].E = s_axis_tdata[i*64 +: 64];
pipe[0][write_ptr + i].C = s_axis_tdata[i*64+64 +: 64];
pipe[0][write_ptr + i].L = s_axis_tdata[i*64+128 +: 64];
pipe[0][write_ptr + i].Phi = s_axis_tdata[i*64+192 +: 64];
pipe[0][write_ptr + i].S = s_axis_tdata[i*64+256 +: 64];
end
end
write_ptr <= write_ptr + 8;
end
end
// ========================================================================
// 4. 9-STAGE DNA PIPELINE (EXACT 5-SEQUENCE)
// ========================================================================
genvar s, i;
generate
for (s = 1; s < PIPE_STAGES; s++) begin : stage
for (i = 0; i < AGENTS; i++) begin : agent
always_ff @(posedge clk) begin
if (!rst_n || !enable) begin
pipe[s][i] <= '0;
end else begin
dna_state_t in = pipe[s-1][i];
dna_state_t out;
// DNA UPDATE (exact, fixed-point)
out.E = in.E + ((in.C - in.E) >>> 3);
out.C = in.C + ((in.L - in.C) >>> 4);
out.L = in.L + ((in.E * in.C) >>> 10);
out.Phi = in.Phi + ((in.E + in.C - (in.Phi <<< 1)) >>> 6);
out.S = in.S + ((in.Phi - in.S) >>> 5);
pipe[s][i] <= out;
end
end
end
end
endgenerate
// ========================================================================
// 5. OUTPUT PACK (8 agents → 512-bit beat)
// ========================================================================
assign m_axis_tvalid = enable && (read_ptr + 8 <= AGENTS);
assign m_axis_tlast = (read_ptr + 8 >= AGENTS);
always_ff @(posedge clk) begin
if (m_axis_tvalid && m_axis_tready) begin
for (int i = 0; i < 8; i++) begin
m_axis_tdata[i*64 +: 64] <= pipe[PIPE_STAGES-1][read_ptr + i].E;
m_axis_tdata[i*64+64 +: 64]<= pipe[PIPE_STAGES-1][read_ptr + i].C;
m_axis_tdata[i*64+128 +: 64]<= pipe[PIPE_STAGES-1][read_ptr + i].L;
m_axis_tdata[i*64+192 +: 64]<= pipe[PIPE_STAGES-1][read_ptr + i].Phi;
m_axis_tdata[i*64+256 +: 64]<= pipe[PIPE_STAGES-1][read_ptr + i].S;
m_axis_tkeep[i*8 +: 8] <= 8'hFF;
end
read_ptr <= read_ptr + 8;
agents_processed <= agents_processed + 8;
end
end
endmodule